Functional Description
Data Bus Buffer
This three-state bi-directional 8-bit buffer is used to interface the 82C55A to the system data bus. Data is transmitted or received by the buffer upon execution of input or output instructions by the CPU. Control words and status information are also transferred through the data bus buffer.
Read/Write and Control Logic
The function of this block is to manage all of the internal and external transfers of both Data and Control or Status words.It accepts inputs from the CPU Address and Control busses and in turn, issues commands to both of the Control Groups.(CS) Chip Select. A “low” on this input pin enables the communcation between the 82C55A and the CPU.
(RD) Read. A “low” on this input pin enables 82C55A to send the data or status information to the CPU on the data bus. In essence, it allows the CPU to “read from” the 82C55A.
(WR) Write. A “low” on this input pin enables the CPU to write data or control words into the 82C55A.
A0 and A1) Port Select 0 and Port Select 1. These input signals, in conjunction with the RD and WR inputs, controlthe selection of one of the three ports or the control word register. They are normally connected to the least significant bits of the address bus (A0 and A1).
(RESET) Reset. A “high” on this input initializes the control register to 9Bh and all ports (A, B, C) are set to the input mode. “Bus hold” devices internal to the 82C55A will hold the I/O port inputs to a logic “1” state with a maximum hold current of 400uA.
Group A and Group B Controls
The functional configuration of each port is programmed by the systems software. In essence, the CPU “outputs” a control word to the 82C55A. The control word contains information such as “mode”, “bit set”, “bit reset”, etc., that initializes the functional configuration of the 82C55A. Each of the Control blocks (Group A and Group B) accepts “commands” from the Read/Write Control logic, receives “control words” from the internal data bus and issues the proper commands to its associated ports. Control Group A - Port A and Port C upper (C7 - C4) Control Group B - Port B and Port C lower (C3 - C0) The control word register can be both written and read as shown in the “Basic Operation” table. Figure 4 shows the control word format for both Read and Write operations. When the control word is read, bit D7 will always be a logic“1”, as this implies control word mode information.
Mode Selection
There are three basic modes of operation than can be selected by the system software:
Mode 0 - Basic Input/Output
Mode 1 - Strobed Input/Output
Mode 2 - Bi-directional Bus
When the reset input goes “high”, all ports will be set to the input mode with all 24 port lines held at a logic “one” level by internal bus hold devices. After the reset is removed, the 82C55A can remain in the input mode with no additional initialization required. This eliminates the need to pullup or pulldown resistors in all-CMOS designs. The control word register will contain 9Bh. During the execution of the system program, any of the other modes may be selected using a single output instruction. This allows a single 82C55A to service a variety of peripheral devices with a simple software maintenance routine. Any port programmed as an output port is initialized to all zeros when the control word is written.
Single Bit Set/Reset Feature
Any of the eight bits of Port C can be Set or Reset using a single Output instruction. This feature reduces software requirements in control-based applications. When Port C is being used as status/control for Port A or B, these bits can be set or reset by using the Bit Set/Reset operation just as if they were output ports.
This is 82C55 PROGRAMMABLE PERIPHERAL INTERFACE.
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Data Bus Buffer
This three-state bi-directional 8-bit buffer is used to interface the 82C55A to the system data bus. Data is transmitted or received by the buffer upon execution of input or output instructions by the CPU. Control words and status information are also transferred through the data bus buffer.
Read/Write and Control Logic
The function of this block is to manage all of the internal and external transfers of both Data and Control or Status words.It accepts inputs from the CPU Address and Control busses and in turn, issues commands to both of the Control Groups.(CS) Chip Select. A “low” on this input pin enables the communcation between the 82C55A and the CPU.
(RD) Read. A “low” on this input pin enables 82C55A to send the data or status information to the CPU on the data bus. In essence, it allows the CPU to “read from” the 82C55A.
(WR) Write. A “low” on this input pin enables the CPU to write data or control words into the 82C55A.
A0 and A1) Port Select 0 and Port Select 1. These input signals, in conjunction with the RD and WR inputs, controlthe selection of one of the three ports or the control word register. They are normally connected to the least significant bits of the address bus (A0 and A1).
(RESET) Reset. A “high” on this input initializes the control register to 9Bh and all ports (A, B, C) are set to the input mode. “Bus hold” devices internal to the 82C55A will hold the I/O port inputs to a logic “1” state with a maximum hold current of 400uA.
Group A and Group B Controls
The functional configuration of each port is programmed by the systems software. In essence, the CPU “outputs” a control word to the 82C55A. The control word contains information such as “mode”, “bit set”, “bit reset”, etc., that initializes the functional configuration of the 82C55A. Each of the Control blocks (Group A and Group B) accepts “commands” from the Read/Write Control logic, receives “control words” from the internal data bus and issues the proper commands to its associated ports. Control Group A - Port A and Port C upper (C7 - C4) Control Group B - Port B and Port C lower (C3 - C0) The control word register can be both written and read as shown in the “Basic Operation” table. Figure 4 shows the control word format for both Read and Write operations. When the control word is read, bit D7 will always be a logic“1”, as this implies control word mode information.
Mode Selection
There are three basic modes of operation than can be selected by the system software:
Mode 0 - Basic Input/Output
Mode 1 - Strobed Input/Output
Mode 2 - Bi-directional Bus
When the reset input goes “high”, all ports will be set to the input mode with all 24 port lines held at a logic “one” level by internal bus hold devices. After the reset is removed, the 82C55A can remain in the input mode with no additional initialization required. This eliminates the need to pullup or pulldown resistors in all-CMOS designs. The control word register will contain 9Bh. During the execution of the system program, any of the other modes may be selected using a single output instruction. This allows a single 82C55A to service a variety of peripheral devices with a simple software maintenance routine. Any port programmed as an output port is initialized to all zeros when the control word is written.
Single Bit Set/Reset Feature
Any of the eight bits of Port C can be Set or Reset using a single Output instruction. This feature reduces software requirements in control-based applications. When Port C is being used as status/control for Port A or B, these bits can be set or reset by using the Bit Set/Reset operation just as if they were output ports.
This is 82C55 PROGRAMMABLE PERIPHERAL INTERFACE.
BACK to Content Page
. Next Page
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