2.2 ALU of 8052 Microcontroller
The ALU performs math functions, comparisons, and decision making. Two SFRs, the accumulator (ACC) and the B register, are the source and destination for most operations. The ALU provides information to the Program Status Word (PSW), which contains a carry bit, an auxiliary carry bit, a parity bit, an overflow bit, register selection bits, and two general use bits.
2.3 Accumulator of 8052 Microcontroller
The accumulator is the primary SFR. It is the source or destination address for most instructions. Arithmetic, Boolean, and branching instructions use the accumulator.
2.4 Program Status Word (PSW) of 8052 Microcontroller
The Program Status Word contains status bits, user flags, and a 2-bit value for register bank select. The status flags are Carry, Auxiliary Carry, Overflow, and Parity.
2.5 Stack Pointer (SP) of 8052 Microcontroller
The 8052 uses internal RAM for its stack. The stack location is not fixed and you may assign any convenient value to SP. The SP defaults to 7 on power up. The stack grows upward. The SP always points to the last location on the stack. PUSH increments the pointer and POP decrements it.
2.6 Data Pointer (DPTR) of 8052 Microcontroller
The Data Pointer designates a 16-bit address in Code or Data memory. The instruction designates the memory type and implements the selection by strobing.
2.7 Timer/Counters of 8052 Microcontroller
The 8052 has three 16-bit Timer/Counters, which may be configured as 8-bit, 13-bit, or 16-bit timers. Timer 2 has capture capability. Other SFRs control the timers, as detailed in the SFR page.
2.8 UART of 8052 Microcontroller
The UART is full duplex. It has a control register and both an input and output buffer, each accessed as SBUF. The correct buffer is determined by the context of the instruction. The serial port may be polled or serviced by an interrupt.
2.9 I/O Ports of 8052 Microcontroller
The 8052 has four I/O ports. When external memory is used, Port 0 and Port 2 serve as multiplexed address/data ports and may not be used for general purpose I/O. The ports have latches which retain the value written by software.
2.10 Program Counter (Pc) of 8052 Microcontroller
A 16-bit PC designates the address of the next instruction to be fetched. The PC is not directly accessible by the user but may be retrieved from the stack after a branching instruction or call. At power up the PC is 0000H. The PC increments with each instruction.
2.11 Scratchpad Registers (Ram) of 8052 Microcontroller
The 8052 contains 256 bytes of RAM in addition to the 128 bytes reserved for SFRs. Direct or indirect addressing accesses the lower 128 bytes. Only indirect addressing accesses the upper 128 bytes. The Stack, Working Register Banks, and Bit-addressable Registers are in the Scratchpad Registers.
2.12 Register Banks of 8052 Microcontroller
The first 32 bytes of Scratchpad RAM are four banks of 8 bytes each, numbered from 0 to 3. Two bits in the PSW register select the active bank. This permits rapid switching of software context. BASIC-52 uses banks 0...2 and never uses bank 3, which is reserved for the user.
2.13 Address/Data Bus of 8052 Microcontroller
The 8052 uses two signals to enable external memory: and. Both signals are active low. goes low with MOVC instructions. goes low with MOVX instructions. enables external code memory and enables external data memory. In both cases, Ports 0 and 2 provide a multiplexed address and data bus. Port 2 has the high byte of the 16-bit address and Port 0 the low. Data transfers occur on Port 0.
2.14 Internal Ram Organization of 8052 Microcontroller
The 8052 has 256 bytes of Scratchpad RAM and 128 bytes of SFR RAM,The SFR registers occupy 80H to 0FFH, the same range as the upper 128 bytes of Scratchpad RAM. The 8052 does not use all of the SFR RAM. Unused SFR registers are reserved and return 0FFH if they are read. The addressing mode determines whether upper Scratchpad RAM or SFR RAM is accessed. Indirect addressing accesses the upper 128 bytes of Scratchpad RAM. Direct addressing accesses SFR RAM. Either indirect or direct addressing accesses the lower 128 bytes of Scratchpad RAM.
2.15 Interrupts
The 8052 has six interrupts:
2 external interrupts
3 timer/counter interrupts
1 serial port interrupt
Interrupt vectors begin at 0003H and each occupies 8 bytes.
The ALU performs math functions, comparisons, and decision making. Two SFRs, the accumulator (ACC) and the B register, are the source and destination for most operations. The ALU provides information to the Program Status Word (PSW), which contains a carry bit, an auxiliary carry bit, a parity bit, an overflow bit, register selection bits, and two general use bits.
2.3 Accumulator of 8052 Microcontroller
The accumulator is the primary SFR. It is the source or destination address for most instructions. Arithmetic, Boolean, and branching instructions use the accumulator.
2.4 Program Status Word (PSW) of 8052 Microcontroller
The Program Status Word contains status bits, user flags, and a 2-bit value for register bank select. The status flags are Carry, Auxiliary Carry, Overflow, and Parity.
2.5 Stack Pointer (SP) of 8052 Microcontroller
The 8052 uses internal RAM for its stack. The stack location is not fixed and you may assign any convenient value to SP. The SP defaults to 7 on power up. The stack grows upward. The SP always points to the last location on the stack. PUSH increments the pointer and POP decrements it.
2.6 Data Pointer (DPTR) of 8052 Microcontroller
The Data Pointer designates a 16-bit address in Code or Data memory. The instruction designates the memory type and implements the selection by strobing.
2.7 Timer/Counters of 8052 Microcontroller
The 8052 has three 16-bit Timer/Counters, which may be configured as 8-bit, 13-bit, or 16-bit timers. Timer 2 has capture capability. Other SFRs control the timers, as detailed in the SFR page.
2.8 UART of 8052 Microcontroller
The UART is full duplex. It has a control register and both an input and output buffer, each accessed as SBUF. The correct buffer is determined by the context of the instruction. The serial port may be polled or serviced by an interrupt.
2.9 I/O Ports of 8052 Microcontroller
The 8052 has four I/O ports. When external memory is used, Port 0 and Port 2 serve as multiplexed address/data ports and may not be used for general purpose I/O. The ports have latches which retain the value written by software.
2.10 Program Counter (Pc) of 8052 Microcontroller
A 16-bit PC designates the address of the next instruction to be fetched. The PC is not directly accessible by the user but may be retrieved from the stack after a branching instruction or call. At power up the PC is 0000H. The PC increments with each instruction.
2.11 Scratchpad Registers (Ram) of 8052 Microcontroller
The 8052 contains 256 bytes of RAM in addition to the 128 bytes reserved for SFRs. Direct or indirect addressing accesses the lower 128 bytes. Only indirect addressing accesses the upper 128 bytes. The Stack, Working Register Banks, and Bit-addressable Registers are in the Scratchpad Registers.
2.12 Register Banks of 8052 Microcontroller
The first 32 bytes of Scratchpad RAM are four banks of 8 bytes each, numbered from 0 to 3. Two bits in the PSW register select the active bank. This permits rapid switching of software context. BASIC-52 uses banks 0...2 and never uses bank 3, which is reserved for the user.
2.13 Address/Data Bus of 8052 Microcontroller
The 8052 uses two signals to enable external memory: and. Both signals are active low. goes low with MOVC instructions. goes low with MOVX instructions. enables external code memory and enables external data memory. In both cases, Ports 0 and 2 provide a multiplexed address and data bus. Port 2 has the high byte of the 16-bit address and Port 0 the low. Data transfers occur on Port 0.
2.14 Internal Ram Organization of 8052 Microcontroller
The 8052 has 256 bytes of Scratchpad RAM and 128 bytes of SFR RAM,The SFR registers occupy 80H to 0FFH, the same range as the upper 128 bytes of Scratchpad RAM. The 8052 does not use all of the SFR RAM. Unused SFR registers are reserved and return 0FFH if they are read. The addressing mode determines whether upper Scratchpad RAM or SFR RAM is accessed. Indirect addressing accesses the upper 128 bytes of Scratchpad RAM. Direct addressing accesses SFR RAM. Either indirect or direct addressing accesses the lower 128 bytes of Scratchpad RAM.
2.15 Interrupts
The 8052 has six interrupts:
2 external interrupts
3 timer/counter interrupts
1 serial port interrupt
Interrupt vectors begin at 0003H and each occupies 8 bytes.
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